Historical
IEEE Std 1364-2005
IEEE Standard for Verilog Hardware Description Language
The Verilog hardware description language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine-readable and human-readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.
CONTENT PROVIDER
Institute of Electrical and Electronics Engineers [ieee]
Institute of Electrical and Electronics Engineers [ieee]