Most recent
DS/EN 16603-20-40:2023
Space engineering - ASIC, FPGA and IP Core engineering
This activity w ill be the parallel development of EN 16603-20-40 and ECSS-E-ST-20-40C.*The scope shall cover the areas of existing ASIC and FPGA engineering chapter 5 of ECSS-Q-ST-60-02C, but w ith w ider breadth and greater depth, covering engineering requirements of end-to-end development flow s, from specification of requirements to validation of prototypes, of the follow ing monolithic devices for its use in space:*• ASICs (distinguishing digital, analogue and mixed-signal development flow s)*• FPGAs (distinguishing three technology families: SRAM, FLASH and anti-fuse technologies)*• ASIC and FPGA System-on-Chip embedding processor cores w hich have external “softw are programme” dependencies to be addressed during the SoC development, resulting in SW-HW co-design requirements.
- ADD TO ALERT |
- PDF |
Danish Standards [ds]
