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Semiconductor Device Standards also cover devices outside of those large series. Smaller IEC series and those from other standards developing organizations provide further information about other devices using semiconductors, such as HVDC systems, switchgear/controlgear, X-ray machines, fiber optics, and others.

IEC 60191-4 Ed. 3.0 b:2013

Mechanical standardization of semiconductor devices Part 4 Coding system and classification into forms of package outlines for semiconductor device packages

IEC 60191-4:2013 specifies a method for the designation of package outlines and for the classification of forms of package outlines for semiconductor devices and a systematic method for generating universal descriptive designators for semiconductor device packages. The descriptive designator provides a useful communication tool but has no implied control for assuring package interchangeability. This edition includes the following significant technical changes with respect to the previous edition: a) Material code "S" is added to indicate a silicon based package. b) Description of "WL" is added to be used for general use.

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IEC 60191-6 Ed. 3.0 b:2009

Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

"IEC 60191-6:2009 gives general rules for the preparation of outline drawings of surface-mounted semiconductor devices. It supplements IEC 60191-1 and IEC 60191-3. It covers all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8, as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4. This third edition of IEC 60191-6 cancels and replaces the second edition, published in 2004 and constitutes a technical revision. This edition includes the following significant changes with respect to the previous edition: a) scope is modified to cover all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8; b) editorial modifications on several pages; and c) technical revision to ball grid array package (BGA) especially its geometrical drawing format. (two types of BGA would unify as one type as a result of revising drawing format. "

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IEC 60191-6-13 Ed. 2.0 b:2016

Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA)

IEC 60191-6-13:2016 specifies a design guideline of open-top-type semiconductor sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA). In particular, this part of IEC 60191 establishes the outline drawings and dimensions of the open-top-type test and burn-in sockets applied to FBGA and FLGA. This edition includes the following significant technical changes with respect to the previous edition: a) BGA package nominal length and width have been newly expanded to 43 mm and 43 mm, respectively. Accordingly, six socket sizes have been added to the socket group numbers 1, 2 and 3, and twenty-two socket sizes have been added to the socket group number 4.

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IEC 60191-6-16 Ed. 1.0 b:2007

Mechanical standardization of semiconductor devices - Part 6-16: Glossary of semiconductor tests and burn-in sockets for BGA, LGA, FBGA and FLGA

IEC 60191-6-16:2007 gives a glossary of semiconductor sockets for BGA, LGA, FBGA and FLGA. This standard intends to establish definitions and unification of terminology relating to tests and burn-in sockets for BGA, LGA, FBGA and FLGA.

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